With an increasing trend toward high-density integrated circuit packages, it is common that architectures move from single chips to dual chips, dual chips to quad chips, quad chips to octal chips, etc. An octal chip allows for higher throughput due to the larger payload of data in comparison to the overhead needed to send the data. Using the same interface model for quad and octal chips may not be efficient. However, as newer, higher capacity “chips” come into production, these higher capacity chips have to interact with legacy devices that do not have the capability to process data in the newer, larger payload format. Without backward compatibility at the interface between the higher capacity chip and the legacy devices, the newer chip cannot perform up to its capacity, if at all.